#include<avr/io.h>

#define F_CPU 9600000

#include<util/delay.h>
#include <avr/sleep.h>


int main(){
	
/*<<Programming Method for ADF4110 Family>>
The program follows the instruction for initial power up: CE pin method which goes as follows:
1. CE put to low to power down the device.
2. At each rising edge of CLK (PB2), a bit will be written into the input register for DATA (PB3).
3. After 24 input bit, LE (PB4) is put to high to complete the transfer.
4. Program Function, R, AB.
5. CE put to high and kept there to power up the device.
*/

int i;
int CLK=0b00000100;
int LE=0b00010000;


_delay_ms(1000);

DDRB=0b11111111;
PORTB=0b00000000; /* Put CE to low*/


/*<<FUNCTION>>*/
/*[00|0|010|010|0000|0|0|0|1|011|0|0|10]*/


for (i=0;i<4;i++){
_delay_ms(10);
PORTB |= CLK;
_delay_ms(10);
PORTB &= CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
for (i=5;i<7;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
for (i=8;i<16;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}


/*3rd byte*/

/* N-Divider (010)*/
/*
PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);
*/

/* DGND (111)*/
/*
PORTB=0b00001000;
for(i=16;i<20;i++){
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);
}*/

/* DVdd (011)*/
PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00001000;
for(i=18;i<20;i++){
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);
}


PORTB=0b00000000;
for (i=20;i<22;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);


/*latch*/
_delay_ms(10);
PORTB|=LE;
_delay_ms(10);
PORTB&=LE;

/*<<R LOAD>>*/
/*[0|0|0|1|00|01|000000000000100|00]*/

/*0*/
for (i=0;i<3;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
for (i=4;i<7;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
for (i=8;i<19;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
for (i=20;i<24;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

/*latch*/
_delay_ms(10);
PORTB|=LE;
_delay_ms(10);
PORTB&=LE;


/*<<N LOAD>>*/
/*[00|0|0000000100101|000100|01]*/

for (i=0;i<11;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
for (i=12;i<14;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00001000;
//for (i=20;i<22;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
//}

PORTB=0b00000000;
for (i=17;i<20;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

PORTB=0b00000000;
for (i=21;i<23;i++){
_delay_ms(10);
PORTB|=CLK;
_delay_ms(10);
PORTB&=CLK;
}

PORTB=0b00001000;
PORTB|=CLK;
_delay_ms(10);
PORTB&=(~CLK);
_delay_ms(10);

/*latch*/
_delay_ms(10);
PORTB|=LE;
_delay_ms(10);
PORTB&=LE;


/*<<CE high: Enable Device>>*/
PORTB=0b00000001 ;

set_sleep_mode(SLEEP_MODE_PWR_DOWN);        // prepare power down
sleep_mode();                               // power down

return 0;
}